Non-volatile semiconductor memory devices have a memory cell region having memory cells and a peripheral circuit region adjacent to the memory cells, having a peripheral circuit which drives the memory cells. The memory cells and peripheral circuit are configured on a single semiconductor die or chip. The memory cells of the memory cell region have a stack gate structure in which for example, a first conductive film to become a charge storage layer, an inter-conductive film insulating film, and a second conductive film to become control circuit are deposited one over the other on a semiconductor substrate via an insulating film. The peripheral circuit of the peripheral circuit region is provided with peripheral elements such as resistance elements and capacitance elements, as well as various transistors and other necessary structures. The peripheral circuit drives the memory cells using these peripheral elements.
In the semiconductor process, the memory cells and the peripheral elements are approximately simultaneously formed in the memory cell region and in the peripheral circuit region, respectively. Therefore, the peripheral elements may be formed using the above-described stack gate structure of the memory cell region in the peripheral circuit region.
When the peripheral elements are formed, contact electrodes are connected to an upper surface of the first conductive film. When a contact hole is formed in an overlying insulative layer down to the upper surface of the first conductive film in which this contact electrode is formed, the upper surface of the first conductive film may be overetched. When the contact electrode is formed in the hole in the first conductive film, the contact electrode may actually extend to the semiconductor substrate.